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The Problems With Standard FPGAs

Jan 20, 2008
FPGA (Field Programmable Gate Array) is not a new device and have been used for a number years since the first arcade game entertainment. Initially they were used with arcade machines to make the graphic display, colour balance and screen resolution better. Regardless of their function without these little logic chips, retro gaming fans would not have been able to play older games in its original form with more improved features. Though since its usage, there have been arguments over how much power is needed to make it work, which has lead to some major manufacturers to design low power FPGA.

What is an FPGA?

Put simply they are programmable devices - digital logic blocks. The user can programme them and control them to perform any digital function that they wish. An FPGA is essentially built from one logic cell which is reproduced hundreds of thousands of times. The first FPGA was designed in 1984 by a co-founder of Xilinx manufacturers, the design is rooted in the CPLD (Complex Programmable Logic Device) which comprised of hundreds to tens of thousands logic gates, whereas the FPGA contained thousands to tens of millions of logic gates.

FPGAs have been scrutinized for using too much power, based upon the way it works. Problems such as static power cause leaking and feed into the FPGA without actually being used. This caused great concerns of current leakage and the possibility of thermal runaway. Manufacturers have come up with new low power FPGA, but are they living up to the same standards as normal FPGAs and are they programmable with any other devices?

Low power FPGA quite literally uses a lower amount of static active and dynamic power. This device is so designed that it comes available wireless, whereas it was impossible to make standard FPGA applicable to wireless applications. Building a lower powered programmable device has put the concern over power consumption at the forefront of these manufacturers.

For those looking to use the low powered devices, one needs to consider the design constraint details, and not fall to hasty on choosing the one with the lowest number. The following things such as whether your design functions on batteries, do you have restrictions currently such as internal USB power and will your device benefit from hibernation, power or clock gating - all of these things need to be considered before opting for this device. Other features of these lower powered devices include features similar to that of newer high-end devices.
About the Author
Anna Stenning is an expert on low power FPGA devices and understands the importance over the concerns on power consumption. For more information on low powered devices log on to http://www.actel.com
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